Role overview
About this role
<p><u><strong>FPGA Development Engineer (f/m/d) - AIRBUS - Immediate start</strong></u><br /> <br /> <strong>Job description and tasks</strong><br /> The jobholder works as a FPGA (Field Programmable Gate Array) Development Engineer (f/md)<br /> and ?will support the design center Telecom & Navigation Processing Germany which<br /> specializes in high performance processing solutions for satellites. The research and development focus<br /> are satellite on-board processing applications, e.g. for future telecommunication or navigation payloads.<br /> Digitization of satellites is key to provide more services and more flexibility for telecommunication and<br /> navigation space industry. The digital processing products of the design center in Ottobrunn can be<br /> reprogrammed for a new mission within minutes from control centers on the ground. emergency services<br /> will then be able to exchange information, coordinate their activities and rescue people in crisis areas<br /> with no means of communication. In addition, edge applications are on the roadmap for future 5G/6G<br /> infrastructures where satellites are seen as possible ”data centers in space” where<br /> processing can be provided on board. The current position will support the on-going development on the<br /> new generation of telecommunication or navigation on-board processor equipment.</p> <p><br /> And these are the main tasks:</p> <ul> <li>Analysis of requirement specification and generation of architectural concept of processor and FPGA functions, hardware software partitioning for system-on-chip components</li> <li>VHDL Detailed Design for Xilinx and Microsemi FPGAs and analysis of the designed components in regard to the appropriate VHDL guidelines and with use of the respective tools and checklists</li> <li>Develop software for system-on-chip processors (optional)</li> <li>Develop and simulate algorithms as part of the SoC designs using Matlab and transfer function from Matlab model into VHDL</li> <li>Simulation of the designed VHDL components using Mentor Questa Tool environment</li> <li>Synthesis, place and route to generate the FPGA programming file</li> <li>Generation of the technical documentation</li> <li>Support of hardware commissioning tests of the FPGA</li> </ul> <p><strong>Personal requirements:</strong><br /> Excellent communication and teamwork skills</p> <p><br /> <em><strong>Severely disabled applicants are given special status if they are equally qualified taken into account.</strong></em><br /> <br /> <strong>Studies</strong><br /> Informatics at least a Master’s / Diploma / Bachelor degree<br /> or<br /> Engineering at least Masters / Diploma / Bachelor degree<br /> or<br /> Aerospace at least Master's / Diploma / Bachelor degree<br /> or<br /> Industrial engineer at least Master's / Diploma / Bachelor course</p> <p><strong>Linguistic proficiency</strong><br /> Business fluent English<br /> German knowledge would be a plus</p> <p><strong>Experience</strong><br /> Experience with VHDL Design and Verification for FPGAs is necessary<br /> Experience in partitioning of HW/SW functions into FPGA or MPSoC Architecture is required</p> <p><br /> <strong>IT</strong><br /> Proven experience with algorithm developments using Matlab is required<br /> Good knowledge of Software Programming of Embedded Systems is required<br /> expertise<br /> Experience with analysis tools to check coding rules and code coverage is necessary<br /> Experience with Mentor Questa Tool Environment is necessary<br /> </p> <p><strong>Legal:</strong> EU or NATO country passport required, for example, UK passport will be ideal</p>